• Analog Conditioning Module • Analog-Digital Converter (ADBoard1 - ADBoard2)
• Data Processing (CoreBoard2) • Connection and Service (FiLaIN/OUT – FiLa10G)
• Timing and Clock (CaT1/2 – Clock and Timing Boards)
Computer Control (PCSet)
DBBC2 Architecture
IFn (MHz)
1~512, 512~1024,1024~1536, 1536~2048
or
1~1024, 1024~2048 MHz
General Features
• 4 RF/IF Input from 16 (4x4) in a range up to 2.2 (3.5) GHz
• Four polarizations or bands available for a single group of 64 output data channel selection (2 VSI output connectors with 1 or 2 Gb/s each)
• Output from the stack to FiLa10G ethernet card as 4x2Gbps
• 1024/2048 MHz sampling clock frequency
• DDC: tunable, channel bandwidth between 1 MHz and 16 MHz, U&L, Continuous cal with 80 Hz synchronization, mode ’astro’, ‘geo’, w-astro’,’ test’
(on VSI binary counter pattern, next revision added MK5 TVG injection)
• PFB: fixed tuning, channel bandwidth 32 MHz, all U or L depending on the Nyquist zone, (next revision VSI test mode injection)
•Additional Instrumentation (spectrometers)
If you need more information about this product or require a quote, send a message to administration@hat-lab.com